A few impressions from the first prototype design of the PTL-ino:

  • 1x PIC 16F1455 (U1)
  • 1x LM7805 (U3)
  • 8x 100nF (C2, C3, C4, C5, C6, C7, C9, C10)
  • 2x 10μF (C1, C8)
  • 1x LED couleur à choix (D1)
  • 1x 220Ω (R1)
  • 1x 4.7kΩ (R2)
  • 1x SWITCH (SW1)
  • 1x mini USB female (version trough-hole with 4 through-hole mounting pins) (P8)
  • 1x 2×3 2.54mm male connector (P5)
  • 1x 1×6 2.54mm male connector (P7)
  • 1x 1×6 2.54mm female connector (P2)
  • 2x 1×8 2.54mm female connector (P1, P4)
  • 1x 1×10 2.54mm female connector (P3)
  • 1x 2×14 2.54mm pin IC socket (for U2)
  • 1x 2×7 2.54 pin IC socket (for U1)
  • 1x PCB
  • 1x Cable mini-USB
  • Hardware: The alpha version PCB was fabricated by OSH Park and the PCB was soldered. There are a few minor issues listed below, but electrically it works as expected.
  • Firmware: The USB-serial conversion is done using a PIC16F1455, for which some preliminary firmware has been written. It allows to flash the AVR chip and use the serial link like an Arduino Uno.

These are features to be addressed for the next version, the final one for the leman make workshop

Item Status Comment
Unify silk screen component designator sizes done
U3 designator under component done
Mark polarity of D1, C1 and C8 on silk screen done currently encoded in pad shape
P5, P6 designator placement (overlap) done
Version number removed Instead of git hash, use a tag
Drills of P8 done USB connector has elongated hole for mounting, it was drilled as a round hole in one edge. Better just use a round hole of 1.2mm in the middle
Possibility of using a dedicated 3.3V regulator (TO-92 done Currently the PIC 3.3V is routed to the shield connector, unclear if/how much current it can supply
Value of C3 (decoupling of PIC 3.3V regulator) done 100nF is not enough better 470nF (ceramic), different footprint?
Placement of R1 done Silk screen would be nicer if labels are close to connector
Label of reset button done call it “reset”
Field for serial number done put white rectangle on back silk screen?
JP1 silk screen done
Add explanation of JP1, JP2, JP3 to silk screen done
Remove solder mask from mounting holes done
Unify size of pads skipped Optimum is probably somewhere between the the IC pads and the connector pads
Add ground test points skipped
  • projects/electronics/ptl-ino/alpha.txt
  • Dernière modification: 2015/06/11 23:40
  • de magnustron